This invention relates generally to power semiconductor devices, and more particularly the invention relates to a power semiconductor rectifier device and a method of making same.
Power semiconductor rectifiers have a variety of applications including use in power supplies and power converters. Heretofore, Schottky diodes have been used in these applications. A Schottky diode is characterized by a low turn-on voltage, fast turnoff, and nonconductance when the diode is reverse biased. However, to create a Schottky diode a metal-silicon barrier must be formed. In order to obtain the proper characteristics for the Schottky diode, the barrier metal is likely different than the metal used in other process steps such as metal ohmic contacts. Further, Schottky diode rectifiers suffer from problems such as high leakage current and reverse power dissipation. Also, these problems increase with temperature causing reliability problems for power supply applications. Therefore, the design of voltage converters using Schottky barrier diodes can cause designer problems for many applications.
A semiconductor power rectifier device is known which does not employ Schottky barriers. FIG. 1 from U.S. Pat. No. 5,818,084 is a schematic of such a device which comprises a MOSFET transistor shown generally at 10 having a source/drain 12 which is shorted to a gate 14. A parasitic diode 16 is connected from the source/drain 12 to the drain/source 16. The patent discloses the use of a trench for accommodating the gate.
Copending application Ser. No. 09/283,537, supra, discloses a vertical semiconductor power rectifier device which employs a large number of parallel connected cells, each comprising a MOSFET structure with a gate-to-drain short via common metallization. This provides a low Vf path through the channel regions of the MOSFET cells to the source region on the other side of the device. The method of manufacturing the rectifier device provides highly repeatable device characteristics at reduced manufacturing costs. The active channel regions of the device are defined using pedestals in a double spacer, double implant self-aligned process. The channel dimensions and doping characteristics may be precisely controlled despite inevitable process variations and spatial sidewall formation.
The present invention is directed to an improved method of manufacturing a semiconductor power rectifier device and the resulting structure. As used herein the term xe2x80x9csource/drainxe2x80x9d is used to include either source or drain depending on device connection.
In accordance with the invention a semiconductor power rectifier device is provided in which a semiconductor substrate functions as one source/drain (e.g. the drain) of the device and a plurality of second source/drain (e.g. source) regions are formed on a major surface of the substrate along with a plurality of gate electrodes with the source/drain and gate electrodes positioned within a guard ring and, optionally, conductive plugs in the major surface.
In preferred embodiments, the semiconductive rectifier device is fabricated using conventional semiconductor processing steps including photoresist masking, plasma etching, and ion implantation in forming the guard ring, conductive plugs, source/drain regions, and gate electrodes overlying device channel regions. In accordance with one feature of the invention, a photoresist mask used in defining the gate oxide and gate of the device is isotropically or otherwise etched to expose peripheral portions of the gate electrode through which ions are implanted to create channel regions in body regions under and controlled by the gate electrode.
In accordance with another feature of the invention, a multiple implant process is provided for creating a pocket around the source/drain (e.g. source) regions in the surface of the device and in forming the channel regions in the body regions underlying the gate electrode which allows controlled variations in device parameters.
In accordance with one embodiment of the invention, the source/drain regions are formed by out-diffusion of dopant from a doped polysilicon layer which functions in interconnecting the guard ring, conductive plugs, and gate electrodes.